CVE intelligence and bounded remediation
CVE-2025-0647 — Arm C1-Ultra Firmware security vulnerability
High
CVSS 7.9
In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.
- Severity
- High
- CVSS
- 7.9 (3.1)
- Published
- 2026-01-14
- CISA KEV
- Not currently listed
- Ecosystem
- operating-system
- Weaknesses
- CWE-226
Affected products
- arm / c1-ultra_firmware
- arm / c1-premium_firmware
- arm / cortex-a710_firmware
- arm / cortex-x2_firmware
- arm / cortex-x3_firmware
- arm / cortex-x4_firmware
Matched remediation archetype
General vulnerability remediation
This catalog composition supplies bounded fallback guidance. Explicitly reviewed curated workflows load with the complete record below.
Check exposure
- Confirm the affected component, deployment paths, reachable interfaces, and enabled features from inventories and configuration, without probing production destructively.
- Compare the advisory's affected conditions with the repository lockfiles, build manifests, artifacts, and runtime inventory.
- Identify data sensitivity, trust boundaries, and privilege level for every confirmed affected deployment.
Remediate safely
- Apply a vendor-supported fix or remove the affected component or feature; record the selected change and its source in the repository.
- Update direct and transitive dependency locks, generated artifacts, deployment manifests, and asset inventories together.
- Add a regression test for the documented unsafe condition using inert inputs and preserve rollback instructions.
Authoritative sources
Complete CVE record and remediation plan
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